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1

AIP Conference Proceedings [Author(s) 30TH INTERNATIONAL SYMPOSIUM ON RAREFIED GAS DYNAMICS: RGD 30 - Victoria, BC, Canada (10–15 July 2016)] - Hypersonic simulations using open-source CFD and DSMC solvers

Casseau, V., Scanlon, T. J., John, B., Emerson, D. R., Brown, R. E.

Year:

2016

Language:

english

File:

PDF, 687 KB

english, 2016

2

Fluid-structure interaction: Extended-FEM approach to solidification

Caraeni, Daniela, Casseau, Vincent, Habashi, Wagdi G.

Journal:

Finite Elements in Analysis and Design

Year:

2020

File:

PDF, 3.54 MB

2020

3

G729 Voice Decoder Design

Fatma Sayadi, Emmanuel Casseau, Mohamed Atri, Mehrez Marzougui, Rached Tourki, Eric Martin

Journal:

Journal of Signal Processing Systems

Year:

2006

Language:

english

File:

PDF, 1.47 MB

english, 2006

4

Design of multi-mode application-specific cores based on high-level synthesis

Emmanuel Casseau, Bertrand Le Gal

Journal:

Integration, the VLSI Journal

Year:

2012

Language:

english

File:

PDF, 780 KB

english, 2012

5

[IEEE 2013 8th International Symposium on Image and Signal Processing and Analysis (ISPA) - Trieste, Italy (2013.9.4-2013.9.6)] 2013 8th International Symposium on Image and Signal Processing and Analysis (ISPA) - Towards run-time actor mapping of dynamic dataflow programs onto multi-core platforms

Yviquel, Herve, Casseau, Emmanuel, Raulet, Mickael, Jaaskelainen, Pekka, Takala, Jarmo

Year:

2013

Language:

english

File:

PDF, 319 KB

english, 2013

6

[IEEE 2014 IEEE International Symposium on Circuits and Systems (ISCAS) - Melbourne VIC, Australia (2014.6.1-2014.6.5)] 2014 IEEE International Symposium on Circuits and Systems (ISCAS) - Improving high-level synthesis effectiveness through custom operator identification

Xiao, Chenglong, Casseau, Emmanuel

Year:

2014

Language:

english

File:

PDF, 607 KB

english, 2014

7

[IEEE 2004 IEEE International Symposium on Circuits and Systems - Vancouver, BC, Canada (23-26 May 2004)] 2004 IEEE International Symposium on Circuits and Systems (IEEE Cat. No.04CH37512) - Reed-Solomon behavioral virtual component for communication systems

Casseau, E., Le Gal, B., Jego, C., Le Heno, N., Martin, E.

Year:

2004

Language:

english

File:

PDF, 290 KB

english, 2004

8

Scheduling, Binding and Routing System for a Run-Time Reconfigurable Operator Based Multimedia Architecture

Raffin, Erwan, Wolinski, Christophe, Charot, François, Casseau, Emmanuel, Floc’h, Antoine, Kuchcinski, Krzysztof, Chevobbe, Stéphane, Guyetant, Stéphane

Journal:

International Journal of Embedded and Real-Time Communication Systems

Year:

2012

Language:

english

File:

PDF, 2.66 MB

english, 2012

9

Design of a flexible 2-D discrete wavelet transform IP core for JPEG2000 image coding in embedded imaging systems

Guillaume Savaton, Emmanuel Casseau, Eric Martin

Journal:

Signal Processing

Year:

2006

Language:

english

File:

PDF, 556 KB

english, 2006

10

Word-Length Aware DSP Hardware Design Flow Based on High-Level Synthesis

Bertrand Le Gal, Emmanuel Casseau

Journal:

Journal of Signal Processing Systems

Year:

2011

Language:

english

File:

PDF, 1.01 MB

english, 2011

11

Constrained algorithmic IP design for system-on-chip

P. Coussy, E. Casseau, P. Bomel, A. Baganne, E. Martin

Journal:

Integration, the VLSI Journal

Year:

2007

Language:

english

File:

PDF, 530 KB

english, 2007

12

Exact custom instruction enumeration for extensible processors

Chenglong Xiao, Emmanuel Casseau

Journal:

Integration, the VLSI Journal

Year:

2012

Language:

english

File:

PDF, 974 KB

english, 2012

13

High-Level Synthesis for Designing Multimode Architectures

Andriamisaina, C., Coussy, P., Casseau, E., Chavet, C.

Journal:

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Year:

2010

Language:

english

File:

PDF, 1.25 MB

english, 2010

14

[IEEE 2006 IEEE Workshop on Signal Processing Systems Design and Implementation - Banff, AB, Canada (2006.10.2-2006.10.4)] 2006 IEEE Workshop on Signal Processing Systems Design and Implementation - Bit-Width Optimizations for High-Level Synthesis of Digital Signal Processing Systems

Andriamisaina, Caaliph, Le Gal, Bertrand, Casseau, Emmanuel

Year:

2006

Language:

english

File:

PDF, 6.92 MB

english, 2006

15

[IEEE 2010 Conference on Design and Architectures for Signal and Image Processing (DASIP) - Edinburgh, United Kingdom (2010.10.26-2010.10.28)] 2010 Conference on Design and Architectures for Signal and Image Processing (DASIP) - A coarse-grain reconfigurable hardware architecture for RVC-CAL-based design

Beaumin, Cecile, Sentieys, Olivier, Casseau, Emmanuel, Carer, Arnaud

Year:

2010

Language:

english

File:

PDF, 1.20 MB

english, 2010

16

[IEEE 2006 IEEE International SOC Conference - Austin, TX (2006.09.24-2006.09.27)] 2006 IEEE International SOC Conference - Bit-Width Aware High-Level Synthesis for Digital Signal Processing Systems

Gal, Bertrand, Andriamisaina, Caaliph, Casseau, Emmanuel

Year:

2006

Language:

english

File:

PDF, 389 KB

english, 2006

17

Automated design of networks of transport-triggered architecture processors using dynamic dataflow programs

Yviquel, Hervé, Boutellier, Jani, Raulet, Mickaël, Casseau, Emmanuel

Journal:

Signal Processing: Image Communication

Year:

2013

Language:

english

File:

PDF, 676 KB

english, 2013

18

[IEEE Comput. Soc. Press European Design and Test Conference - Paris, France (11-14 March 1996)] Proceedings ED&TC European Design and Test Conference - High rate soft output Viterbi decoder

Luthi, E., Casseau, E.

Year:

1996

Language:

english

File:

PDF, 548 KB

english, 1996

19

[IEEE 2006 International Conference on Computer Engineering and Systems - Cairo (2006.11.5-2006.11.7)] 2006 International Conference on Computer Engineering and Systems - Interface Architecture Generation for IP Integration in SoC Design

Abbes, Fatma, Abid, Mohamed, Casseau, Emmanuel

Year:

2006

Language:

english

File:

PDF, 6.77 MB

english, 2006

20

[IEEE 2006 International Conference on Computer Engineering and Systems - Cairo (2006.11.5-2006.11.7)] 2006 International Conference on Computer Engineering and Systems - IP encapsulation: Approach and Case Study

Abbes, Fatma, Casseau, Emmanuel, Abid, Mohamed

Year:

2006

Language:

english

File:

PDF, 5.87 MB

english, 2006

21

[IEEE 2007 2nd NASA/ESA Conference on Adaptive Hardware and Systems - Edinburgh (2007.08.5-2007.08.8)] Second NASA/ESA Conference on Adaptive Hardware and Systems (AHS 2007) - Synthesis of Multimode digital signal processing systems

Andriamisaina, C., Casseau, E., Coussy, P.

Year:

2007

Language:

english

File:

PDF, 381 KB

english, 2007

22

[IEEE 2009 20th IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAP) - Boston, MA, USA (2009.07.7-2009.07.9)] 2009 20th IEEE International Conference on Application-specific Systems, Architectures and Processors - Reconfigurable SWP Operator for Multimedia Processing

Khan, Shafqat, Casseau, Emmanuel, Menard, Daniel

Year:

2009

Language:

english

File:

PDF, 164 KB

english, 2009

23

Embedded Multi-Core Systems Dedicated to Dynamic Dataflow Programs

Yviquel, Hervé, Sanchez, Alexandre, Jääskeläinen, Pekka, Takala, Jarmo, Raulet, Mickaël, Casseau, Emmanuel

Journal:

Journal of Signal Processing Systems

Year:

2015

Language:

english

File:

PDF, 2.66 MB

english, 2015

24

[IEEE 2011 Conference on Design and Architectures for Signal and Image Processing (DASIP) - Tampere, Finland (2011.11.2-2011.11.4)] Proceedings of the 2011 Conference on Design & Architectures for Signal & Image Processing (DASIP) - Efficient maximal convex custom instruction enumeration for extensible processors

Xiao, Chenglong, Casseau, Emmanuel

Year:

2011

Language:

english

File:

PDF, 713 KB

english, 2011

25

[IEEE 2009 International Symposium on Systems, Architectures, Modeling, and Simulation (SAMOS) - Samos, Greece (2009.07.20-2009.07.23)] 2009 International Symposium on Systems, Architectures, Modeling, and Simulation - High-level synthesis for the design of FPGA-based signal processing systems

Casseau, Emmanuel, Le Gal, Bertrand

Year:

2009

Language:

english

File:

PDF, 998 KB

english, 2009

26

[IEEE 2007 IEEE/ACM International Conference on Computer-Aided Design - San Jose, CA, USA (2007.11.4-2007.11.8)] 2007 IEEE/ACM International Conference on Computer-Aided Design - A design flow dedicated to multi-mode architectures for DSP applications

Chavet, Cyrille, Andriamisaina, Caaliph, Coussy, Philippe, Casseau, Emmanuel, Juin, Emmanuel, Urard, Pascal, Martin, Eric

Year:

2007

Language:

english

File:

PDF, 886 KB

english, 2007

27

[IEEE 9th EUROMICRO Conference on Digital System Design (DSD'06) - Cavtat, Dubrovnik, Croatia ()] 9th EUROMICRO Conference on Digital System Design (DSD'06) - A Computation Core for Communication Refinement of Digital Signal Processing Algorithms

Huet, S., Casseau, E., Pasquier, O.

Year:

2006

Language:

english

File:

PDF, 213 KB

english, 2006

28

[IEEE 2011 IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAP) - Santa Monica, CA, USA (2011.09.11-2011.09.14)] ASAP 2011 - 22nd IEEE International Conference on Application-specific Systems, Architectures and Processors - Efficient custom instruction enumeration for extensible processors

Xiao, Chenglong, Casseau, Emmanuel

Year:

2011

Language:

english

File:

PDF, 451 KB

english, 2011

29

[IEEE 7th International Conference on VLSI Design - Calcutta, India (5-8 Jan. 1994)] Proceedings of 7th International Conference on VLSI Design - A linear systolic array for LU decomposition

Casseau, E., Degrugillier, D.

Year:

1994

Language:

english

File:

PDF, 496 KB

english, 1994

30

[IEEE 13th Annual IEEE International ASIC/SOC Conference - Arlington, VA, USA (13-16 Sept. 2000)] Proceedings of 13th Annual IEEE International ASIC/SOC Conference (Cat. No.00TH8541) - Real time application architectural synthesis dedicated to sub-micron technologies

Jego, C., Casseau, E., Martin, E.

Year:

2000

Language:

english

File:

PDF, 544 KB

english, 2000

31

[IEEE 13th Annual IEEE International ASIC/SOC Conference - Arlington, VA, USA (13-16 Sept. 2000)] Proceedings of 13th Annual IEEE International ASIC/SOC Conference (Cat. No.00TH8541) - High-level synthesis and behavioral VHDL writing style towards a methodology for behavioral IP reuse

Savaton, G., Casseau, E., Martin, E.

Year:

2000

Language:

english

File:

PDF, 537 KB

english, 2000

32

[IEEE 2007 14th IEEE International Conference on Electronics, Circuits and Systems (ICECS '07) - Marrakech (2007.12.11-2007.12.14)] 2007 14th IEEE International Conference on Electronics, Circuits and Systems - HLS design flow for the synthesis of multimode systems under multiple constraints

Le Gal, Bertrand, Bossuet, Lilian, Khan, Shafqat, Casseau, Emmanuel

Year:

2007

Language:

english

File:

PDF, 373 KB

english, 2007

33

[IEEE 2011 IEEE Workshop on Signal Processing Systems (SiPS) - Beirut, Lebanon (2011.10.4-2011.10.7)] 2011 IEEE Workshop on Signal Processing Systems (SiPS) - Stochastic modeling for floating-point to fixed-point conversion

Banciu, Andrei, Casseau, Emmanuel, Menard, Daniel, Michel, Thierry

Year:

2011

Language:

english

File:

PDF, 455 KB

english, 2011

34

[IEEE 2010 Conference on Design and Architectures for Signal and Image Processing (DASIP) - Edinburgh, United Kingdom (2010.10.26-2010.10.28)] 2010 Conference on Design and Architectures for Signal and Image Processing (DASIP) - A case study of the stochastic modeling approach for range estimation

Banciu, Andrei, Casseau, Emmanuel, Menard, Daniel, Michel, Thierry

Year:

2010

Language:

english

File:

PDF, 277 KB

english, 2010

35

[IEEE 2010 Conference on Design and Architectures for Signal and Image Processing (DASIP) - Edinburgh, United Kingdom (2010.10.26-2010.10.28)] 2010 Conference on Design and Architectures for Signal and Image Processing (DASIP) - Scheduling, binding and routing system for a run-time reconfigurable operator based multimedia architecture

Raffin, E., Wolinski, Ch., Charot, F., Kuchcinski, K., Guyetant, S., Chevobbe, S., Casseau, E.

Year:

2010

Language:

english

File:

PDF, 442 KB

english, 2010

36

[IEEE 8th Euromicro Conference on Digital System Design (DSD'05) - Porto, Portugal (30-03 Aug. 2005)] 8th Euromicro Conference on Digital System Design (DSD'05) - Hardware Virtual Components Compliant with Communication System Standards

Abdelli, N., Bomel, P., Casseau, E., Foulliart, A., Jego, C., Kaiffasz, P., Le Gal, B., Le Heno, N.

Year:

2005

File:

PDF, 308 KB

2005

37

[IEEE 2011 IEEE Workshop on Signal Processing Systems (SiPS) - Beirut, Lebanon (2011.10.4-2011.10.7)] 2011 IEEE Workshop on Signal Processing Systems (SiPS) - Efficient multicore scheduling of dataflow process networks

Yviquel, Herve, Casseau, Emmanuel, Wipliez, Matthieu, Raulet, Mickael

Year:

2011

Language:

english

File:

PDF, 171 KB

english, 2011

38

[IEEE The 16th International Conference on Microelectronics, 2004. ICM 2004. - Tunis, Tunisia (Dec. 6-8, 2004)] Proceedings. The 16th International Conference on Microelectronics, 2004. ICM 2004. - IP integration methodology for SoC design

Abbes, F., Casseau, E., Abid, M., Coussy, P., Ugoff, J.B.

Year:

2004

Language:

english

File:

PDF, 802 KB

english, 2004

39

[IEEE ICASSP 2014 - 2014 IEEE International Conference on Acoustics, Speech and Signal Processing (ICASSP) - Florence, Italy (2014.5.4-2014.5.9)] 2014 IEEE International Conference on Acoustics, Speech and Signal Processing (ICASSP) - Efficient software synthesis of dynamic dataflow programs

Yviquel, H., Sanchez, A., Jaaskelainen, P., Takala, J., Raulet, M., Casseau, E.

Year:

2014

Language:

english

File:

PDF, 74 KB

english, 2014

40

[IEEE ICASSP 2011 - 2011 IEEE International Conference on Acoustics, Speech and Signal Processing (ICASSP) - Prague, Czech Republic (2011.05.22-2011.05.27)] 2011 IEEE International Conference on Acoustics, Speech and Signal Processing (ICASSP) - Exploiting reconfigurable SWP operators for multimedia applications

Menard, D., Nguyen, H.N., Charot, F., Guyetant, S., Guillot, J., Raffin, E., Casseau, E.

Year:

2011

Language:

english

File:

PDF, 122 KB

english, 2011

41

[IEEE 2006 13th IEEE International Conference on Electronics, Circuits and Systems - Nice, France (2006.12.10-2006.12.13)] 2006 13th IEEE International Conference on Electronics, Circuits and Systems - IP Generation Targeting Multiple Bit-Width Standards

Le Gal, Bertrand, Casseau, Emmanuel

Year:

2006

Language:

english

File:

PDF, 454 KB

english, 2006

42

Automatic custom instruction identification for application-specific instruction set processors

Xiao, Chenglong, Casseau, Emmanuel, Wang, Shanshan, Liu, Wanjun

Journal:

Microprocessors and Microsystems

Year:

2014

Language:

english

File:

PDF, 1.69 MB

english, 2014

43

[IEEE 16th IEEE International Workshop on Rapid System Prototyping (RSP'05) - Montreal, Canada (08-10 June 2005)] 16th IEEE International Workshop on Rapid System Prototyping (RSP'05) - Design Exploration and HW/SW Rapid Prototyping for Real-Time System Design

Huet, S., Casseau, E., Pasquier, O.

Year:

2005

Language:

english

File:

PDF, 83 KB

english, 2005

44

[IEEE IEEE Computer Society Annual Symposium on VLSI: New Frontiers in VLSI Design (ISVLSI'05) - Tampa, FL, USA (11-12 May 2005)] IEEE Computer Society Annual Symposium on VLSI: New Frontiers in VLSI Design (ISVLSI'05) - Pipelined Memory Controllers for DSP Applications Handling Unpredictable Data Accesses

Le Gal, B., Casseau, E., Huet, S., Martin, E.

Year:

2005

Language:

english

File:

PDF, 166 KB

english, 2005

45

[IEEE Third International Conference on Electronics, Circuits, and Systems - Rodos, Greece (13-16 Oct. 1996)] Proceedings of Third International Conference on Electronics, Circuits, and Systems - Architecture of a high-rate VLSI Viterbi decoder

Casseau, E., Luthi, E.

Year:

1996

Language:

english

File:

PDF, 481 KB

english, 1996

46

A formal method for hardware IP design and integration under I/O and timing constraints

Coussy, Philippe, Casseau, Emmanuel, Bomel, Pierre, Baganne, Adel, Martin, Eric

Journal:

ACM Transactions on Embedded Computing Systems

Year:

2006

Language:

english

File:

PDF, 2.08 MB

english, 2006

47

[ACM Press the 21st edition of the great lakes symposium - Lausanne, Switzerland (2011.05.02-2011.05.04)] Proceedings of the 21st edition of the great lakes symposium on Great lakes symposium on VLSI - GLSVLSI '11 - An efficient algorithm for custom instruction enumeration

Xiao, Chenglong, Casseau, Emmanuel

Year:

2011

Language:

english

File:

PDF, 1.18 MB

english, 2011

48

[American Institute of Aeronautics and Astronautics 20th AIAA International Space Planes and Hypersonic Systems and Technologies Conference - Glasgow, Scotland ()] 20th AIAA International Space Planes and Hypersonic Systems and Technologies Conference - Development of a Two-Temperature Open-Source CFD Model for Hypersonic Reacting Flows

Casseau, Vincent, Scanlon, Thomas J, Brown, Richard E.

Language:

english

File:

PDF, 819 KB

english

49

[IEEE 2014 International Conference on ReConFigurable Computing and FPGAs (ReConFig) - Cancun, Mexico (2014.12.8-2014.12.10)] 2014 International Conference on ReConFigurable Computing and FPGAs (ReConFig14) - Place Reservation technique for online task placement on a multi-context heterogeneous reconfigurable architecture

Le, Quang Hoa, Casseau, Emmanuel, Courtay, Antoine

Year:

2014

Language:

english

File:

PDF, 853 KB

english, 2014

50

[IEEE 2015 IEEE Computer Society Annual Symposium on VLSI (ISVLSI) - Montpellier, France (2015.7.8-2015.7.10)] 2015 IEEE Computer Society Annual Symposium on VLSI - Small FPGA Based Multiplication-Inversion Unit for Normal Basis Representation in GF(2m)

Metairie, Jeremy, Tisserand, Arnaud, Casseau, Emmanuel

Year:

2015

Language:

english

File:

PDF, 249 KB

english, 2015